The present invention relates to integrated circuits, and more particularly to nonvolatile memories with charge-trapping dielectric.
Some nonvolatile memories include charge-trapping dielectric separated from a conductive region (e.g. doped silicon substrate) by tunnel dielectric. The memory state is defined by the charge in the charge-trapping dielectric. To change the memory state, a suitable voltage is applied to cause charge transfer through the tunnel dielectric between the charge-trapping dielectric and the conductive region. In order to provide good data retention, the charge leakage should be low when no voltage is not applied, so the tunnel dielectric should be sufficiently thick. However, the thick tunnel dielectric impedes the charge transfer when the voltage is applied, thus making memory write operations slow. See e.g. U.S. patent application Ser. No. 11/131,006 filed May 17, 2005 by Bhattacharyya, published as no. 2006/0261401 on Nov. 23, 2006, incorporated herein by reference.